CVE-2020-24512 — Observable Discrepancy in Intel Microcode
Severity
3.3LOWNVD
OSV5.6
EPSS
0.1%
top 80.01%
CISA KEV
Not in KEV
Exploit
No known exploits
Affected products
Timeline
PublishedJun 9
Latest updateMay 2
Description
Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
CVSS vector
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:L/I:N/A:NExploitability: 1.8 | Impact: 1.4
🔴Vulnerability Details
4GHSA▶
GHSA-7hm5-8cp5-vqp5: Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local acces↗2022-05-24
CVEList▶
CVE-2020-24512: Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local acces↗2021-06-09
OSV▶
CVE-2020-24512: Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local acces↗2021-06-09
📋Vendor Advisories
5Debian▶
CVE-2020-24512: intel-microcode - Observable timing discrepancy in some Intel(R) Processors may allow an authentic...↗2020