CVE-2020-8696
published 2020-11-12CVE-2020-8696: Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable…
PriorityP421medium5.5CVSS 3.1
AVLACLPRLUINSUCHINAN
EPSS
0.44%
35.9th percentile
Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
Affected
3 ranges
| Vendor | Product | Version range | Fixed in |
|---|---|---|---|
| debian | debian_linux | — | — |
| debian | intel-microcode | < intel-microcode 3.20201110.1 (bookworm) | intel-microcode 3.20201110.1 (bookworm) |
| fedoraproject | fedora | — | — |
CVSS provenance
nvdv3.15.5MEDIUMCVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N
nvdv2.02.1LOWAV:L/AC:L/Au:N/C:P/I:N/A:N
osv5.5MEDIUM
vendor_debian5.5MEDIUM
vendor_redhat5.5MEDIUM
vendor_ubuntu5.5MEDIUM
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Ubuntu
Intel Microcode vulnerabilities
vendor_ubuntu·2021-05-17·CVSS 5.5
CVE-2020-8698 [MEDIUM] Intel Microcode vulnerabilities
Title: Intel Microcode vulnerabilities
Summary: Several security issues were fixed in Intel Microcode.
USN-4628-1 provided updated Intel Processor Microcode for various processor
types. This update provides the corresponding updates for some additional
processor types.
Original advisory details:
Moritz Lipp, Michael Schwarz, Andreas Kogler, David Oswald, Catherine
Easdon, Claudio Canella, and Daniel Gruss discovered that the Intel Running
Average Power Limit (RAPL) feature of some Intel processors allowed a side-
channel attack based on power consumption measurements. A local attacker
could possibly use this to expose sensitive information. (CVE-2020-8695)
Ezra Caltum, Joseph Nuzman, Nir Shildan and Ofir Joseff discovered that
some Intel(R) Processors did not properly remove sensitive
Ubuntu
Intel Microcode regression
vendor_ubuntu·2020-11-12·CVSS 5.5
[MEDIUM] Intel Microcode regression
Title: Intel Microcode regression
Summary: USN-4628-1 introduced a regression in the Intel Microcode for some processors.
USN-4628-1 provided updated Intel Processor Microcode. Unfortunately,
that update prevented certain processors in the Intel Tiger Lake family
from booting successfully. This update reverts the microcode update for
the Tiger Lake processor family.
Please note that the 'dis_ucode_ldr' kernel command line option can be
added in the boot menu to disable microcode loading for system recovery.
We apologize for the inconvenience.
Original advisory details:
Moritz Lipp, Michael Schwarz, Andreas Kogler, David Oswald, Catherine
Easdon, Claudio Canella, and Daniel Gruss discovered that the Intel Running
Average Power Limit (RAPL) feature of some Intel processors allowed a si
Ubuntu
Intel Microcode vulnerabilities
vendor_ubuntu·2020-11-11·CVSS 5.5
CVE-2020-8698 [MEDIUM] Intel Microcode vulnerabilities
Title: Intel Microcode vulnerabilities
Summary: Several security issues were fixed in Intel Microcode.
Moritz Lipp, Michael Schwarz, Andreas Kogler, David Oswald, Catherine
Easdon, Claudio Canella, and Daniel Gruss discovered that the Intel Running
Average Power Limit (RAPL) feature of some Intel processors allowed a side-
channel attack based on power consumption measurements. A local attacker
could possibly use this to expose sensitive information. (CVE-2020-8695)
Ezra Caltum, Joseph Nuzman, Nir Shildan and Ofir Joseff discovered that
some Intel(R) Processors did not properly remove sensitive information
before storage or transfer in some situations. A local attacker could
possibly use this to expose sensitive information. (CVE-2020-8696)
Ezra Caltum, Joseph Nuzman, Nir Shildan and O
Red Hat
hw: Vector Register Leakage-Active
vendor_redhat·2020-11-10·CVSS 5.5
CVE-2020-8696 [MEDIUM] CWE-212 hw: Vector Register Leakage-Active
hw: Vector Register Leakage-Active
Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
A flaw was found in the Intel Advanced Vector Extensions (AVX) implementation, where a local authenticated attacker with the ability to execute AVX instructions can gather the AVX register state from previous AVX executions. This vulnerability allows information disclosure of the AVX register state.
Package: microcode_ctl (Red Hat Enterprise Linux 5) - Out of support scope
Debian
CVE-2020-8696: intel-microcode - Improper removal of sensitive information before storage or transfer in some Int...
vendor_debian·2020·CVSS 5.5
CVE-2020-8696 [MEDIUM] CVE-2020-8696: intel-microcode - Improper removal of sensitive information before storage or transfer in some Int...
Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
Scope: local
bookworm: resolved (fixed in 3.20201110.1)
bullseye: resolved (fixed in 3.20201110.1)
forky: resolved (fixed in 3.20201110.1)
sid: resolved (fixed in 3.20201110.1)
trixie: resolved (fixed in 3.20201110.1)
GHSA
GHSA-qrq2-q88f-xpv2: Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable
ghsa_unreviewed·2022-05-24
CVE-2020-8696 [MEDIUM] CWE-212 GHSA-qrq2-q88f-xpv2: Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable
Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
OSV
intel-microcode vulnerabilities
osv·2021-05-17·CVSS 5.5
[MEDIUM] intel-microcode vulnerabilities
intel-microcode vulnerabilities
USN-4628-1 provided updated Intel Processor Microcode for various processor
types. This update provides the corresponding updates for some additional
processor types.
Original advisory details:
Moritz Lipp, Michael Schwarz, Andreas Kogler, David Oswald, Catherine
Easdon, Claudio Canella, and Daniel Gruss discovered that the Intel Running
Average Power Limit (RAPL) feature of some Intel processors allowed a side-
channel attack based on power consumption measurements. A local attacker
could possibly use this to expose sensitive information. (CVE-2020-8695)
Ezra Caltum, Joseph Nuzman, Nir Shildan and Ofir Joseff discovered that
some Intel(R) Processors did not properly remove sensitive information
before storage or transfer in some situations. A local atta
OSV
CVE-2020-8696: Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable
osv·2020-11-12·CVSS 5.5
CVE-2020-8696 [MEDIUM] CVE-2020-8696: Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable
Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
OSV
intel-microcode regression
osv·2020-11-12·CVSS 5.5
[MEDIUM] intel-microcode regression
intel-microcode regression
USN-4628-1 provided updated Intel Processor Microcode. Unfortunately,
that update prevented certain processors in the Intel Tiger Lake family
from booting successfully. This update reverts the microcode update for
the Tiger Lake processor family.
Please note that the 'dis_ucode_ldr' kernel command line option can be
added in the boot menu to disable microcode loading for system recovery.
We apologize for the inconvenience.
Original advisory details:
Moritz Lipp, Michael Schwarz, Andreas Kogler, David Oswald, Catherine
Easdon, Claudio Canella, and Daniel Gruss discovered that the Intel Running
Average Power Limit (RAPL) feature of some Intel processors allowed a side-
channel attack based on power consumption measurements. A local attacker
could possibly use
OSV
intel-microcode vulnerabilities
osv·2020-11-11·CVSS 5.5
CVE-2020-8695 [MEDIUM] intel-microcode vulnerabilities
intel-microcode vulnerabilities
Moritz Lipp, Michael Schwarz, Andreas Kogler, David Oswald, Catherine
Easdon, Claudio Canella, and Daniel Gruss discovered that the Intel Running
Average Power Limit (RAPL) feature of some Intel processors allowed a side-
channel attack based on power consumption measurements. A local attacker
could possibly use this to expose sensitive information. (CVE-2020-8695)
Ezra Caltum, Joseph Nuzman, Nir Shildan and Ofir Joseff discovered that
some Intel(R) Processors did not properly remove sensitive information
before storage or transfer in some situations. A local attacker could
possibly use this to expose sensitive information. (CVE-2020-8696)
Ezra Caltum, Joseph Nuzman, Nir Shildan and Ofir Joseff discovered that
some Intel(R) Processors did not properly iso
No detection rules found.
No public exploits indexed.
Bugzilla
CVE-2020-8696 hw: Vector Register Leakage-Active
bugzilla·2020-10-22·CVSS 5.5
CVE-2020-8696 [MEDIUM] CVE-2020-8696 hw: Vector Register Leakage-Active
CVE-2020-8696 hw: Vector Register Leakage-Active
A flaw was found in the implementation of Intel Advanced Vector Extensions (AVX) where a local authenticated attacker with the ability to execute AVX instructions is able to gather AVX register state from previous AVX executions.
This could allow information disclosure of AVX register state.
Discussion:
External References:
https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00381.html
---
Acknowledgments:
Name: Intel
---
This issue has been addressed in the following products:
Red Hat Enterprise Linux 8
Via RHSA-2020:5085 https://access.redhat.com/errata/RHSA-2020:5085
---
This issue has been addressed in the following products:
Red Hat Enterprise Linux 6
Via RHSA-2020:5084 https://access.redhat.com/er
Bugzilla
CVE-2019-8696 cups: stack-buffer-overflow in libcups's asn1_get_packed function
bugzilla·2019-08-07·CVSS 8.8
CVE-2019-8696 [HIGH] CVE-2019-8696 cups: stack-buffer-overflow in libcups's asn1_get_packed function
CVE-2019-8696 cups: stack-buffer-overflow in libcups's asn1_get_packed function
A stack-buffer-overflow was found in libcups's asn1_get_packed function
Discussion:
Acknowledgments:
Name: Apple Product Security
Upstream: Stephan Zeisberg (Security Research Labs)
---
References:
https://github.com/apple/cups/releases/tag/v2.2.12
https://support.apple.com/en-in/HT210348
---
Upstream commit:
https://github.com/apple/cups/commit/f24e6cf6a39300ad0c3726a41a4aab51ad54c109
---
Created cups tracking bugs for this issue:
Affects: fedora-all [bug 1742935]
---
This issue has been addressed in the following products:
Red Hat Enterprise Linux 8
Via RHSA-2020:1765 https://access.redhat.com/errata/RHSA-2020:1765
---
This bug is now closed. Further updates for individual products will be
https://lists.debian.org/debian-lts-announce/2021/02/msg00007.htmlhttps://lists.fedoraproject.org/archives/list/package-announce%40lists.fedoraproject.org/message/MAAGIK5CXKBPGY3R4UR5VO56M7MKLZ43/https://security.netapp.com/advisory/ntap-20201113-0006/https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00381https://lists.debian.org/debian-lts-announce/2021/02/msg00007.htmlhttps://lists.fedoraproject.org/archives/list/package-announce%40lists.fedoraproject.org/message/MAAGIK5CXKBPGY3R4UR5VO56M7MKLZ43/https://security.netapp.com/advisory/ntap-20201113-0006/https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00381
2020-11-12
Published