CVE-2024-44949
published 2024-09-04CVE-2024-44949: In the Linux kernel, the following vulnerability has been resolved: parisc: fix a possible DMA corruption ARCH_DMA_MINALIGN was defined as 16 - this is too…
PriorityP338high7.8CVSS 3.1
AVLACLPRLUINSUCHIHAH
EPSS
0.23%
14.1th percentile
In the Linux kernel, the following vulnerability has been resolved:
parisc: fix a possible DMA corruption
ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be
possible that two unrelated 16-byte allocations share a cache line. If
one of these allocations is written using DMA and the other is written
using cached write, the value that was written with DMA may be
corrupted.
This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 -
that's the largest possible cache line size.
As different parisc microarchitectures have different cache line size, we
define arch_slab_minalign(), cache_line_size() and
dma_get_cache_alignment() so that the kernel may tune slab cache
parameters dynamically, based on the detected cache line size.
Affected
15 ranges
| Vendor | Product | Version range | Fixed in |
|---|---|---|---|
| debian | linux | < linux 6.1.119-1 (bookworm) | linux 6.1.119-1 (bookworm) |
| debian | linux-6.1 | < linux 6.1.119-1 (bookworm) | linux 6.1.119-1 (bookworm) |
| linux | linux | — | — |
| linux | linux | >= a01fece2e4185ac173abd16d10304d73d47ebf00 < 00baca74fb5879e5f9034b6156671301f500f8ee | 00baca74fb5879e5f9034b6156671301f500f8ee |
| linux | linux | >= a01fece2e4185ac173abd16d10304d73d47ebf00 < 642a0b7453daff0295310774016fcb56d1f5bc7f | 642a0b7453daff0295310774016fcb56d1f5bc7f |
| linux | linux | >= a01fece2e4185ac173abd16d10304d73d47ebf00 < 533de2f470baac40d3bf622fe631f15231a03c9f | 533de2f470baac40d3bf622fe631f15231a03c9f |
| linux | linux | >= a01fece2e4185ac173abd16d10304d73d47ebf00 < 7ae04ba36b381bffe2471eff3a93edced843240f | 7ae04ba36b381bffe2471eff3a93edced843240f |
| linux | linux_kernel | < 6.6.46 | 6.6.46 |
| linux | linux_kernel | — | — |
| linux | linux_kernel | >= 0 < 6.1.119-1 | 6.1.119-1 |
| linux | linux_kernel | >= 0 < 6.10.6-1 | 6.10.6-1 |
| linux | linux_kernel | >= 0 < 6.10.6-1 | 6.10.6-1 |
| linux | linux_kernel | >= 6.7 < 6.10.5 | 6.10.5 |
| msrc | cbl2_kernel_5.15.176.3-1_on_cbl_mariner_2.0 | — | — |
| msrc | cbl2_kernel_5.15.182.1-1_on_cbl_mariner_2.0 | — | — |
CVSS provenance
nvdv3.17.8HIGHCVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H
osv7.8HIGH
vendor_debian7.8HIGH
vendor_msrc7.8HIGH
vendor_redhat7.8HIGH
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CISA ICS
Siemens Third-Party Components in SINEC OS
cisa_ics·2025-08-14
Siemens Third-Party Components in SINEC OS
ICS Advisory
##
Siemens Third-Party Components in SINEC OS
Release DateAugust 14, 2025
Alert CodeICSA-25-226-07
Related topics:
Industrial Control System Vulnerabilities, Industrial Control Systems
As of January 10, 2023, CISA will no longer be updating ICS security advisories for Siemens product vulnerabilities beyond the initial advisory. For the most up-to-date information on vulnerabilities in this advisory, please see Siemens' ProductCERT Security Advisories (CERT Services | Services | Siemens Global).
View CSAF
## 1. EXECUTIVE SUMMARY
- CVSS v3 9.1
- ATTENTION: Exploitable remotely/low attack complexity
- Vendor: Siemens
- Equipment: Third-Party Components in SINEC OS
- Vulnerabilities: Improper Input Validation, Use After Free, Out-of-bounds Read,
Microsoft
parisc: fix a possible DMA corruption
vendor_msrc·2024-09-10·CVSS 7.8
CVE-2024-44949 [HIGH] parisc: fix a possible DMA corruption
parisc: fix a possible DMA corruption
FAQ: Is Azure Linux the only Microsoft product that includes this open-source library and is therefore potentially affected by this vulnerability?
One of the main benefits to our customers who choose to use the Azure Linux distro is the commitment to keep it up to date with the most recent and most secure versions of the open source libraries with which the distro is composed. Microsoft is committed to transparency in this work which is why we began publishing CSAF/VEX in October 2025. See this blog post for more information. If impact to additional products is identified, we will update the CVE to reflect this.
Mariner: Mariner
Linux: Linux
Customer Action Required: Yes
Remediation: CBL-Mariner Releases
Reference: https://learn.microsoft.com/en-
Red Hat
kernel: parisc: fix a possible DMA corruption
vendor_redhat·2024-09-04·CVSS 7.8
CVE-2024-44949 [HIGH] CWE-665 kernel: parisc: fix a possible DMA corruption
kernel: parisc: fix a possible DMA corruption
In the Linux kernel, the following vulnerability has been resolved:
parisc: fix a possible DMA corruption
ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be
possible that two unrelated 16-byte allocations share a cache line. If
one of these allocations is written using DMA and the other is written
using cached write, the value that was written with DMA may be
corrupted.
This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 -
that's the largest possible cache line size.
As different parisc microarchitectures have different cache line size, we
define arch_slab_minalign(), cache_line_size() and
dma_get_cache_alignment() so that the kernel may tune slab cache
parameters dynamically, based on the detected cache li
Debian
CVE-2024-44949: linux - In the Linux kernel, the following vulnerability has been resolved: parisc: fix...
vendor_debian·2024·CVSS 7.8
CVE-2024-44949 [HIGH] CVE-2024-44949: linux - In the Linux kernel, the following vulnerability has been resolved: parisc: fix...
In the Linux kernel, the following vulnerability has been resolved: parisc: fix a possible DMA corruption ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be possible that two unrelated 16-byte allocations share a cache line. If one of these allocations is written using DMA and the other is written using cached write, the value that was written with DMA may be corrupted. This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 - that's the largest possible cache line size. As different parisc microarchitectures have different cache line size, we define arch_slab_minalign(), cache_line_size() and dma_get_cache_alignment() so that the kernel may tune slab cache parameters dynamically, based on the detected cache line size.
Scope: local
bookworm: resolved (fixed
OSV
CVE-2024-44949: In the Linux kernel, the following vulnerability has been resolved: parisc: fix a possible DMA corruption ARCH_DMA_MINALIGN was defined as 16 - this i
osv·2024-09-04·CVSS 7.8
CVE-2024-44949 [HIGH] CVE-2024-44949: In the Linux kernel, the following vulnerability has been resolved: parisc: fix a possible DMA corruption ARCH_DMA_MINALIGN was defined as 16 - this i
In the Linux kernel, the following vulnerability has been resolved: parisc: fix a possible DMA corruption ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be possible that two unrelated 16-byte allocations share a cache line. If one of these allocations is written using DMA and the other is written using cached write, the value that was written with DMA may be corrupted. This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 - that's the largest possible cache line size. As different parisc microarchitectures have different cache line size, we define arch_slab_minalign(), cache_line_size() and dma_get_cache_alignment() so that the kernel may tune slab cache parameters dynamically, based on the detected cache line size.
GHSA
GHSA-wxc5-fq68-h9mh: In the Linux kernel, the following vulnerability has been resolved:
parisc: fix a possible DMA corruption
ARCH_DMA_MINALIGN was defined as 16 - this
ghsa_unreviewed·2024-09-04
CVE-2024-44949 [HIGH] GHSA-wxc5-fq68-h9mh: In the Linux kernel, the following vulnerability has been resolved:
parisc: fix a possible DMA corruption
ARCH_DMA_MINALIGN was defined as 16 - this
In the Linux kernel, the following vulnerability has been resolved:
parisc: fix a possible DMA corruption
ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be
possible that two unrelated 16-byte allocations share a cache line. If
one of these allocations is written using DMA and the other is written
using cached write, the value that was written with DMA may be
corrupted.
This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 -
that's the largest possible cache line size.
As different parisc microarchitectures have different cache line size, we
define arch_slab_minalign(), cache_line_size() and
dma_get_cache_alignment() so that the kernel may tune slab cache
parameters dynamically, based on the detected cache line size.
No detection rules found.
No public exploits indexed.
No writeups or analysis indexed.
https://git.kernel.org/stable/c/00baca74fb5879e5f9034b6156671301f500f8eehttps://git.kernel.org/stable/c/533de2f470baac40d3bf622fe631f15231a03c9fhttps://git.kernel.org/stable/c/642a0b7453daff0295310774016fcb56d1f5bc7fhttps://git.kernel.org/stable/c/7ae04ba36b381bffe2471eff3a93edced843240fhttps://lists.debian.org/debian-lts-announce/2025/01/msg00001.html
2024-09-04
Published