CVE-2025-22889
published 2025-08-12CVE-2025-22889: Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially…
PriorityP335high7.9CVSS 3.1
AVLACLPRHUINSCCHIHAN
EPSS
0.15%
4.6th percentile
Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.
Affected
1 ranges
| Vendor | Product | Version range | Fixed in |
|---|---|---|---|
| debian | intel-microcode | < intel-microcode 3.20250812.1~deb12u1 (bookworm) | intel-microcode 3.20250812.1~deb12u1 (bookworm) |
CVSS provenance
nvdv3.17.9HIGHCVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:N
nvdv4.07.0HIGHCVSS:4.0/AV:L/AC:L/AT:P/PR:H/UI:N/VC:H/VI:H/VA:N/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
osv7.0HIGH
vendor_ubuntu7.2HIGH
vendor_debian7.0HIGH
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Ubuntu
Intel Microcode vulnerabilities
vendor_ubuntu·2025-11-10·CVSS 7.2
CVE-2025-26403 [HIGH] Intel Microcode vulnerabilities
Title: Intel Microcode vulnerabilities
Summary: Several security issues were fixed in Intel Microcode.
Barak Gross discovered that some Intel® Xeon® processors with SGX enabled
did not properly handle buffer restrictions. A local authenticated user
could potentially use this issue to escalate their privileges.
(CVE-2025-20053)
Avinash Maddy discovered that some Intel® processors did not properly
isolate or compartmentalize the stream cache mechanisms. A local
authenticated user could potentially use this issue to escalate their
privileges. (CVE-2025-20109)
Joseph Nuzman discovered that some Intel® Xeon® processors did not properly
manage references to active allocate resources. A local authenticated user
could potentially use this issue to cause a denial of service (system
crash). (CVE
Debian
CVE-2025-22889: intel-microcode - Improper handling of overlap between protected memory ranges for some Intel(R) X...
vendor_debian·2025·CVSS 7.0
CVE-2025-22889 [HIGH] CVE-2025-22889: intel-microcode - Improper handling of overlap between protected memory ranges for some Intel(R) X...
Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.
Scope: local
bookworm: resolved (fixed in 3.20250812.1~deb12u1)
bullseye: resolved (fixed in 3.20250812.1~deb11u1)
forky: resolved (fixed in 3.20250812.1)
sid: resolved (fixed in 3.20250812.1)
trixie: resolved (fixed in 3.20250812.1~deb13u1)
OSV
intel-microcode vulnerabilities
osv·2025-11-10·CVSS 7.0
CVE-2025-20053 [HIGH] intel-microcode vulnerabilities
intel-microcode vulnerabilities
Barak Gross discovered that some Intel® Xeon® processors with SGX enabled
did not properly handle buffer restrictions. A local authenticated user
could potentially use this issue to escalate their privileges.
(CVE-2025-20053)
Avinash Maddy discovered that some Intel® processors did not properly
isolate or compartmentalize the stream cache mechanisms. A local
authenticated user could potentially use this issue to escalate their
privileges. (CVE-2025-20109)
Joseph Nuzman discovered that some Intel® Xeon® processors did not properly
manage references to active allocate resources. A local authenticated user
could potentially use this issue to cause a denial of service (system
crash). (CVE-2025-21090)
It was discovered that some Intel® Xeon® 6 processors did
OSV
CVE-2025-22889: Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to po
osv·2025-08-12·CVSS 7.0
CVE-2025-22889 [HIGH] CVE-2025-22889: Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to po
Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.
GHSA
GHSA-x9p4-6h68-vm5q: Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to po
ghsa_unreviewed·2025-08-12
CVE-2025-22889 [HIGH] CWE-1260 GHSA-x9p4-6h68-vm5q: Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to po
Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.
No detection rules found.
No public exploits indexed.
No writeups or analysis indexed.
2025-08-12
Published